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Main menu for Browse IS/STAG
Course info
KEI / ACZP
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Course description
Department/Unit / Abbreviation
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KEI
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ACZP
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Academic Year
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2024/2025
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Academic Year
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2024/2025
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Title
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Application of digital signal processing
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Form of course completion
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Exam
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Form of course completion
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Exam
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Accredited / Credits
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Yes,
4
Cred.
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Type of completion
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Combined
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Type of completion
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Combined
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Time requirements
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Lecture
2
[Hours/Week]
Tutorial
2
[Hours/Week]
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Course credit prior to examination
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Yes
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Course credit prior to examination
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Yes
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Automatic acceptance of credit before examination
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Yes in the case of a previous evaluation 4 nebo nic.
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Included in study average
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YES
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Language of instruction
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Czech, English
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Occ/max
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Automatic acceptance of credit before examination
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Yes in the case of a previous evaluation 4 nebo nic.
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Summer semester
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0 / -
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0 / -
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0 / -
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Included in study average
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YES
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Winter semester
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3 / -
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1 / -
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0 / -
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Repeated registration
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NO
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Repeated registration
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NO
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Timetable
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Yes
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Semester taught
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Winter semester
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Semester taught
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Winter semester
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Minimum (B + C) students
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10
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Optional course |
Yes
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Optional course
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Yes
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Language of instruction
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Czech, English
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Internship duration
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0
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No. of hours of on-premise lessons |
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Evaluation scale |
1|2|3|4 |
Periodicity |
každý rok
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Evaluation scale for credit before examination |
S|N |
Periodicita upřesnění |
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Fundamental theoretical course |
No
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Fundamental course |
Yes
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Fundamental theoretical course |
No
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Evaluation scale |
1|2|3|4 |
Evaluation scale for credit before examination |
S|N |
Substituted course
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None
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Preclusive courses
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N/A
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Prerequisite courses
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N/A
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Informally recommended courses
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N/A
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Courses depending on this Course
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KEI/SNEAP
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Histogram of students' grades over the years:
Graphic PNG
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XLS
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Course objectives:
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The aim of this subject is to extend knowledge of students in the field of digital signal processing using modern digital signal processors (DSP) and programmable logic devices (FPGA). Students will familiarize with advanced development systems for implementation of digital signal processing systems by DSP and FPGA devices.
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Requirements on student
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Laboratory Credits: Attend the labs, completion of laboratory exercises, a presentation of individual work.
Exam requirements: consists of two parts - written part and oral exams.
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Content
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Lectures:
BLOCK I.
Characteristics of DSP hardware devices (TI).
Modern methods in signal processing, Goertzel, spectral analysis, digital oscillators.
HW support of complex methods of digital signal processing on modern signal processors.
Effective HW implementation of linear algebra algorithms in signal processing and debugging methods.
BLOCK II.
Hardware and software tools for digital signal processing in FPGA.
Implementation of signal processing in FPGA (DFT, DDS, FIR, CORDIC).
Software processors in the FPGA, an overview.
Software NIOS processor, bus AvalonBus, peripherals, simulation, implementation in FPGA.
Exercises:
BLOCK I.
Introduction to development tools TI - EVM, IDE, peripherals.
Simple applications, performance measurements.
Working on a project of linear algebra, telecommunication, audio processing or image processing.
BLOCK II.
Introduction to the tool NIOS II Embedded Design Suite (EDS) and QSYS.
Working on the project with software processor and digital signal processing in FPGA.
Introduction to DSP Builder tools for Simulink / Matlab.
Working on a project with digital signal processing in FPGA.
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Activities
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Fields of study
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Studentům je k dispozici elektronické materiály ve formátu PDF předávané v rámci výuky předmětu.
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Guarantors and lecturers
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Guarantors:
Doc. Ing. Martin Poupa, Ph.D. (100%),
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Lecturer:
Ing. Vladimír Pavlíček, Ph.D. (50%),
Doc. Ing. Martin Poupa, Ph.D. (50%),
Ing. Ivo Veřtát, Ph.D. (100%),
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Tutorial lecturer:
Ing. Vladimír Pavlíček, Ph.D. (50%),
Doc. Ing. Martin Poupa, Ph.D. (50%),
Ing. Ivo Veřtát, Ph.D. (100%),
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Literature
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Basic:
Pinker, Jiří; Poupa, Martin. Číslicové systémy a jazyk VHDL. Praha : BEN - technická literatura, 2006. ISBN 80-7300-198-5.
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Basic:
Davídek, Vratislav; Sovka, Pavel. Číslicové zpracování signálů a implementace. Praha : Vydavatelství ČVUT, 2002. ISBN 80-01-02483-0.
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Recommended:
Jan, Jiří. Číslicová filtrace, analýza a restaurace signálů. 2., upr. a rozš. vyd. V Brně : VUTIUM, 2002. ISBN 80-214-1558-4.
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Recommended:
Meyer-Bäse, Uwe. Digital signal processing with field programmable gate arrays. 3rd ed. Berlin : Springer, 2007. ISBN 978-3-540-72612-8.
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Recommended:
The Scientist and Engineer's Guide To Digital Signal Processing, Second Edition
(Smith, W. Steven)
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Recommended:
Sedláček, Miloš. Zpracování signálu v měřící technice. dotisk 1. vyd. Praha : ČVUT, 1996. ISBN 80-01-00900-9.
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On-line library catalogues
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Time requirements
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All forms of study
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Activities
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Time requirements for activity [h]
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Preparation for an examination (30-60)
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30
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Contact hours
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26
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Preparation for formative assessments (2-20)
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10
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Preparation for comprehensive test (10-40)
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10
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Practical training (number of hours)
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26
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Total
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102
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Prerequisites
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Knowledge - students are expected to possess the following knowledge before the course commences to finish it successfully: |
knowledge of CPLD and FPGA device architectures |
knowledge of the digital signal processing chain, including theoretical parts |
knowledge of digital filter design |
use the VHDL language for description, simulation and synthesis of digital circuits |
use a VHDL simulator |
use development system for the synthesis of circuits into the FPGA and CPLD |
use C language for MCU and DSP |
Skills - students are expected to possess the following skills before the course commences to finish it successfully: |
understand the function of a digital circuit |
analyze complex digital systems |
design of basic digital circuits in VHDL |
knowledge of basics of digital signal processing |
filters FIR and IIR, direct digital signal synthesis DDS |
algorithmize |
code formatting |
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Learning outcomes
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Knowledge - knowledge resulting from the course: |
knowledge of digital signal processors (DSP) |
knowledge of programmable logic circuits (FPGA) |
realize digital signal processing by DSP with fix and floating point support |
realize digital signal processing by FPGA devices with VHDL and software processors |
Skills - skills resulting from the course: |
to work with design tools: TI - EVM IDE, DSP Builder Simulink / Matlab, Intel Quartus, QSYS and NIOS II Embedded Design Suite |
realize several examples of digital signal processing system and verify them by the simulation and practical implementation in the DSP device |
realize several examples of digital signal processing system and verify them by the simulation and practical implementation in the FPGA device |
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Assessment methods
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Knowledge - knowledge achieved by taking this course are verified by the following means: |
Combined exam |
Seminar work |
Skills - skills achieved by taking this course are verified by the following means: |
Skills demonstration during practicum |
Seminar work |
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Teaching methods
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Knowledge - the following training methods are used to achieve the required knowledge: |
Lecture |
Laboratory work |
Task-based study method |
Interactive lecture |
Individual study |
Self-study of literature |
Students' portfolio |
Skills - the following training methods are used to achieve the required skills: |
Laboratory work |
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